“An Efficient VLSI architecture design for logarithmic multiplication by using the improved operand decomposition” Elsevier, VLSI the integration journal, Vol. 58, pp. 134-141, June 2017, DOI: 10.1016/j.vlsi.2017.02.003 (SCI)
Ask for paper““Statistical Analysis of Lower and Raised Pitch Voice Signal and its Efficiency Calculation,” Traitement du Signal, Vol. 36, No. 5, pp. 455-461, October 2019 (IF-1.541)
Ask for paper“A Multiple L-Shaped Slot Loaded Antenna with Multiband Circularly Polarized for WLAN and WiMAX Applications” International Journal of International Journal of Engineering and Advanced Technology (IJEAT), Volume-8 Issue-6S, pp. 965-969, August 2019 (Scopus).
Ask for paper“A Systematic Review of Multipliers: Accuracy and Performance Analysis ” International Journal of Engineering and Advanced Technology (IJEAT), Volume-8 Issue-6S, pp. 965-969, August 2019 (Scopus).
Ask for paper“An efficient VLSI architecture design of Leading One Detector” International journal of pure and applied mathematics, Vol.118 (14), pp. 267-272, 2018 (Scopus).
Ask for paper“65 years journey of logarithm multiplier” International journal of pure and applied mathematics, Vol.118 (14), pp. 261-266, 2018 (Scopus).
Ask for paper“An efficient architecture of Iterative Logarithmic Multiplier” IInternational journal of engineering & technology (UAE). Vol.7 (2.16), pp. 24-28, 2018 (Scopus).
Ask for paper“Implementation of Leading One Detector based on reversible logic for logarithmic arithmetic” International Journal of Computer Applications, Vol.173 (8), pp. 40-45, Sep. 2017.
Ask for paper“Logarithmic Multiplier: An Analytical Review ” International Journal of Engineering Research, Volume No.5, Issue No.8, pp: 721-723, August 2016.
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